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single-cycle cpu implementation
Joined: Feb 27, 2012
Feb 27, 2012 05:43:03
Hi all ,
On the textbooks I 've got I always read that
implementig a single cycle cpu requires two memories
one for data and one for instructions.
why this happens ?
Using a single memory with two read ports (see figure below) wouldn't it be
possibile to fetch the instruction and read
the operand specified in it during the same cycle ?
I’ve looked at a lot of different solutions, and in my humble opinion Aspose is the way to go. Here’s the link:
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